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Customizable ARM-Based SoC Slide 9

With the variable-precision DSP block, the Arria® V and Cyclone® V FPGAs support, on a block-by-block basis, various precisions ranging from 9-bit x 9-bit up to single-precision floating point within a single DSP block. This frees designers from FPGA architecture restrictions, allowing one to use the optimum precision at each stage of the DSP datapath. They will also benefit from increased system performance and reduced power consumption.

PTM Published on: 2014-03-19