For over a decade Intel® has been working with embedded customers to meet the specific embedded design requirements. The theme of boosting system performance while reducing system power, board size and costs for customers is nothing new. As FPGAs move down the path of Moore’s Law, the company has been able to integrate higher levels of functionality into the devices, while taking advantage of the power and performance benefits achieved at smaller process technologies. Intel® offers unprecedented levels of integration in its devices through the use of Hard IP. This enables them to bring more functions into the device, allowing customers to reduce the number of discrete devices on a board and reduces BOM costs. For example, the Cyclone® V FPGA family delivers 40% lower power than the previous generation. The devices have hardened functions such as memory controllers, PCIe blocks and an increased number of faster transceivers to boost bandwidth. As a result of the innovations in these devices, FPGA usage in embedded systems has become much more common. An embedded survey by UBM found that nearly 45% of embedded designers plan to use an FPGA in the next embedded project. Many customers are now featuring an FPGA along side a microprocessor in the embedded system and more than 30% of Intel® devices shipped feature an embedded Nios® II processor. With Intel®’s 28-nm portfolio, there is an unprecedented opportunity to address the performance, power, integration and cost needs of embedded developers even more so than in the past.