The Qsys System Integration Tool in Intel®’s Quartus® II design software has a GUI that lets developers add IP components to the system. IP cores based on Arm®’s AMBA AXI interface standard as well as Intel®’s Avalon Memory Mapped and Avalon Streaming protocols are supported. Qsys generates an FPGA-optimized network-on-a-chip interconnect that can be modified by the user to achieve the desired frequency and latency performance. Qsys creates custom subsystems and save them as design templates for future reuse. Qsys also supports design hierarchy so the subsystems can be assembled quickly into a custom design.