This slide begins a review of how to implement capacitive sensing using the C8051F99x family from Silicon Labs. The 16-bit SAR block is implemented as a complete stand-alone block and generates its own time base. This allows the SAR to run autonomously from the CPU and provides the capability to wake the CPU from a low power state. Also integrated is a 20-bit accumulator that can add one, four, eight or sixteen scans and then provide the division using a simple shift function. Using this hardware accumulator and simple shift function provides a low overhead averaging function to reduce the affects of noise, thus increasing performance of the system. The window comparator is software programmable and is set based on the system level performance of the pad configurations. After the idle and signal levels are determined and a suitable threshold is obtained, the window comparator can be set to trigger an event when the active switch threshold is met. This is useful to reduce CPU overhead and also for low power modes. The CS0 module conversion is capable of being generated from several sources including software trigger, all of the timers and auto-scanning. Because all of the required components for capacitive sensing are integrated on chip, the capacitive sense pad can connect directly to the MCU.