For FPGAs configuration time is different than what is known as wake up time. Configuration begins only after the device is fully powered up which includes a VCC ramp time and a POR (power on reset). Applications with a fast wake up time specification need to utilize fast POR and fast configuration modes. POR time and configuration time are user selectable with the mode select pins on the FPGA. A fast POR option also requires the use of a fast VCC ramp time. For further information please refer to the Cyclone® IV FPGA handbook available online.