In the case of Cyclone® IV E, the mathematics are straightforward. The core voltage of the Cyclone® IV E is lower than the 1.2V of the Cyclone® III. As such, the lower core voltage results in both static power and dynamic power savings resulting in up to 25% lower total power. In the case of Cyclone® IV GX, the comparison is made to a comparable system. In the current generation of products, external SERDES ASSPs are used for the high speed serial I/O interface to the FPGA. With Cyclone® IV GX integrated transceivers, the total power consumption to perform the identical function is 30% lower. By creating various test cases using industry standard SERDES components, and performing power comparisons, the data in the table on this slide shows that the most conservative system benefits with a 30% power savings. For larger designs and higher transceiver counts, the power savings can be greater.