Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Product List
Powering FPGAs Slide 7
This slide shows how different output capacitor values in the same design change the load transient response for a buck converter. The scope image on the left shows a smaller overshoot/undershoot with the correct sizing of voltage out. The scope image on the right shows the effect of insufficient output capacitance. The result is a much bigger overshoot/undershoot of 110mV. Instability in the form of ringing can also be seen. Note that in this test, the load current was stepped from 100 to 300mA. If the load step was even larger, the voltage excursions would also be larger. Check the regulator’s datasheets for suggested values.
PTM Published on: 2011-11-02