Load transients require careful consideration when powering core voltages. A load transient is a sudden increase or decrease of the current demanded by the core logic. An example of this is when the FPGA goes from an idle state to full operation. Depending on the size of the design, this can be a significant load step. Dealing with the sudden change in load current while still maintaining output voltage within tolerance is no small matter. There are two basic power supply design considerations to make when designing for improved load transient response. First, use an additional bulk output capacitor to act as a reservoir during transients. Second, use a higher switching frequency to increase loop response.