Now this module will discuss the RX’s instruction set, and as it does, imagine an individual in the role of the engineer tasked with designing the instruction set for the RX. Their job is to improve code density: speeding throughput in all aspects of instruction handling and allowing the use of smaller memory devices or the ability to add more features in the same memory. The individual also needs to support modern high level languages and make it easy for the compiler writes to create efficient optimizers. No doubt, one would first try to get their hands on some real world application code. They would look at it to see the kinds of applications their customers were writing and what kinds of instructions and memory addressing they typically used. That is exactly what Renesas engineers did while designing the RX’s instruction set; they gathered real code from over 32 customers across a spectrum of industries and analyzed it. This led them to adopt a variable byte-length instruction to help minimize the code footprint. Now back to the example of the engineer. After analyzing the real world application code, one would look at histograms of instruction usage, take the most commonly used instruction, and then assign them to the shortest instruction code. One would then add flexible addressing to fully support the bus architecture we saw earlier.