Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Slide 24 Slide 25 Slide 26 Slide 27 Slide 28 Slide 29 Slide 30 Slide 31 Slide 32 Slide 33 Slide 34 Slide 35 Product List
PLL
The LPC2300 and 2400 MCUs have a main oscillator that accepts crystals directly from 1 MHz to 24 MHz, however the Phase Locked Loop (PLL) allows the oscillator to accept crystals up to 72 MHz by itself accepting input clocks from 32 kHz to 50 MHz and outputting from 10 MHz to 72 MHz. The PLL is protected from engaging accidentally by bypassing it after a chip reset or power down and requires a special feed sequence to enable it.
PTM Published on: 2011-11-02