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Image of MoSys Accelerator Bandwidth Engine: High Performance/High Bandwidth - MoSys Supplied FPGA

This illustration shows the support that is available from Peraso for easy adoption of the Peraso devices in a direct way to reduce the latency of the design effort and support a quicker time to market. In this regard, Peraso can support the development of the controller that resides in the FPGA, or it is even possible to have Peraso provide one that exists already or at a minimum they can provide an example controller that can be the basis off which to develop a custom design. In addition to the controller, Peraso can provide RTL that implements the GCI protocol that is used as the protocol for the SerDes links. This is code that has been used on dozens of designs and has been field tested for over a decade. The third area in which Peraso can support the quick adoption of the accelerator engines into a design are the devices themselves. Peraso has been supplying the devices to customers for over a decade with 100’s of thousands of devices in the field.

PTM Published on: 2021-08-11