Shown here is a single (monolithic) device from Peraso that can support greater throughput while providing the density of four QDR devices or eight QDR devices with the 576Mb or 1Gb devices that are available in production from Peraso. In addition to the significant board space savings and the reduced number of devices offered, it also reduces power (and possibly the associated power supplies and regulators). It also requires a fraction of the PCB board traces which can save PCB layers and layout time. Each of the areas of physical space, power, reliability, supporting RTL, pure access speed, and latency are addressed by the Peraso accelerator engine families.