NAND Flash memory stores data in an array of memory cells comprised of floating-gate transistors. Programming, reading and erasing NAND Flash cells is achieved by manipulating voltage applied to each cell. This electrical activity effectively wears out the physical structure of the cell over time, thus resulting in a finite lifetime for the memory cells. This lifetime is measured in terms of Program/Erase (P/E) cycles and is affected by both process geometry and the number of bits stored in each cell.