The USB High Speed Device Port (UDPHS) is compliant with the USB rev 2.0 High-Speed device specification. This peripheral has a dedicated 4 kB DPRAM memory. This dedicated memory is useful to store full packet payloads without utilizing the two general purpose SRAM blocks. The use of this DPRAM also prevents buffer underflow or overflow and allows to reduce the system clock. The user has up to three banked buffers per endpoint to store micro-frames. As was explained previously, the USB port has also a dedicated DMA master controller, allowing the user to perform large transfers without CPU overhead. In addition, the seven endpoints are fully configurable in bulk, interrupt, isochronous or control mode. The number and size of banked DPR buffers is also configurable. The table provided on this slide gives the values of the maximum bandwidth that can be achieved for the different modes. Note that this is limited by the USB protocol which is a hindrance to reach the 480 Mbps bandwidth value.