Control peripheral verification with the ADC and the PWMs are the most critical peripherals, but CAN, SCI and SPI are very critical peripheral as well. CAN often plays a very critical role on the system for providing information to receiving commands. CAN also has some very safety critical information that is shared. The RAM that is used on the CAN module for the mailboxes has parity error detection. There also are several different loopback mechanisms to verify at run-time or at power-up that the CAN module is functional, so there is internal loopback. That particular loopback allows the designer to connect up the transmit and receive internally and verify that they could do some communication and receive, just verify that some basic functionality on the CAN module is intact. Now, if the designer puts it in the external loopback mode, it is very similar to the internal one except for that the I/O buffers are actually used for that, so it has additional level of coverage. Finally, the internal loopback with silent mode is what is utilized at run time. It allows the user to have the internal loopback of the transmit connected to the receive without disturbing the CAN bus that is connected to, so it allows for actual run-time verification in the CAN module. On the SCI and SPI, both have internal loopback and active FIFOs. What is also interesting is that both the SCI and SPI have connections between the M3 and the C28. So the M3 can listen to C28 SCIA transmit pin and the M3 can also listen to the C28 SPIA transmit pin. So the designer can actually communicate between the M3 and the C28 via the serial ports, but the real intention is that the M3 can listen to the communications that the C28 is doing. Again, it has supervisory level control or visibility and observation of what is happening on the C28 side of the processor.