This slide will take a look at generic fanout out buffers. These devices are used to generate multiple copies of an input clock. Typically they do not integrate a PLL. Fanout buffers can have multiple inputs. Some fanout buffers can support an external XTAL as input. Fanout buffers can have anywhere from 2 to 24 outputs. The acceptable input and output levels; are device dependent, but generally, all common levels are supported. The NB3N853531E depicted below has 2 inputs. One must be a single ended clock signal. The other one can only be used with an external XTAL. It is not mandatory to use both inputs. If both inputs are used the CLK_SEL (Clock Select) pin is used to choose the input clock to distribute to the outputs. As seen on this slide, the NB3N853531E has 4 differential outputs.