Programmable clocks integrate 1 or more PLLs. The device shown here, the FS6370, has 3 independent PLLs. PLLs are programmable, which imply that output frequencies are programmable and flexible. Note that once the device is programmed, the PLL multiplication factor is locked and the output frequency will depend on the input frequency. For example, if a user has a 25 MHz input clock and they want a 125 MHz output, the PLL will be configured to multiply by 5. If for some reason the input frequency was to change to 20 MHz, then the output frequency would change be 100 MHz. If 125 MHz was still the desired output, the PLL would have to be re-programmed to multiply by 6.25. Typically programmable clocks can be reprogrammed in real-time. These devices are programmed via I²C. The FS6370 shown here is programmed via I²C. Depending on the device, all or most output frequencies are completely independent from each other if desired. Some devices, like the one shown here, integrate an EEPROM in which a start-up configuration is saved. If no EEPROM device is integrated: designers can either use an external EEPROM or program the device via CPU or similar after boot-up.