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Clock and Data Distribution Products Part 2 Slide 23

This slide shows a server using a FB-DIMM memory with HCSL timing interfaces. The NB3N111K which has 10 HCSL outputs, is used to distribute 9 copies of a signal coming from an FPGA, CPU, or other to the Memory Controller and each of the 8 FB-DIMM modules.

PTM Published on: 2014-08-04