The switching dynamics of the converter drives the performance outcome of the paralleled switch. eGaN FETs have characteristics that enable paralleling, such as a positive temperature coefficient of RDS(on) and a very low VTH shift as a function of temperature. Common source inductance and gate source inductance, however, significantly impact the switch performance.  The first step to paralleling is to balance all leakage inductances in order to minimize any circulating current. This requires both a careful and symmetric layout and a single source for the gate drive.