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paralleling-slide10

This slide presents design B in more detail. The graph shows the PIF results as function of the number of FETs in the switch from one through four, having two configurations for the two FET version. The layout configurations are shown in the images above the graph. It is important to note the large difference in result for the two FET version by simple layout change. In the long layout version the switch current is in parallel with the inter-FET source inductance whereas it is orthogonal in the tall version. This emphasizes the strong impact the orthogonality principle brings to the design.

PTM Published on: 2012-04-26