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Topic 5 The Analog Subsystem Slide 5

Shown on this slide are the details of the analog sub-system, illustrating how the buses are connected to the sub-system. The Cortex-M3 resources of the CPU and the DMA as well as the C28X and its DMA are connected to the sub-system through an interface called a common interface bus (CIB). This bus allows multiple interfaces to connect to the analog sub-system and access the ADC. One point of reference to keep in mind is that the ADCs on the sub-system, (ADC1 and ADC2) are based on Piccolo ADCs. They are 12-bit ADCs, and each of the ADCs has two sample-and-holds, giving a total of two converters, and four sample-and-holds. These four sample-and-holds can be used for simultaneous conversion of four analog signals. The ADC is a hybrid ADC. It is both a SAR and a pipelined ADC, taking advantage of both aspects. Also, it is a ratiometric ADC, providing the noise immunity benefits that are typical with a ratiometric ADC, and a VREF high and VREF low that are used as part of the conversion. There are a total of either sixteen or twenty input channels available on these ADCs. Depending on the exact derivative of the device there are thirty two result registers. Reviewing the exact pin connections, it is possible to see how to take advantage of these result registers even when there are less than thirty two input channels. Drawing on experience applying Piccolo ADCs, the user can convert the same channel and use all the result registers for that single channel, for example when doing over-sampling. There are six analog comparators on board, six 10-bit DACs, the same comparator technology as on Piccolo and the same DACs with a few minor twists. Two temperature sensors are connected to the ADCs, one per A/D module. Similar to the Piccolo, there are four to eight digital inputs with the analog I/Os (AIOs). The sub-system also features a voltage regulator with brownout and power-on-reset detection. Differences between the Concerto ADC and the Piccolo ADC include the ADC clock which has a maximum frequency of 37.5 MHz, one temperature sensor is shared between the two converters, and four shared analog I/O channels and eight shared triggers, the trigger sources that start the sample-and-hold.

PTM Published on: 2012-02-23