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crystal vs clock2
Clock generators and clock buffers are used when several reference frequencies are required and the target ICs are all on the same board or in the same IC or FPGA. In some applications, FPGA/ASICs have multiple time domains for the data path, control plane and memory controller interface, and as a result require multiple unique reference frequencies. This is a good place for a clock generator. A clock generator or buffer is also better when the IC cannot accommodate a crystal input, when the IC must be synchronized to an external reference (source-synchronous application), or when a high-frequency reference is required.
PTM Published on: 2017-03-01