Saving power is one of the major concerns facing design engineers today. At the same time, designers are looking to increase performance and added features, such as graphical user interfaces, wireless connectivity, and longer battery life. Configurable logic is available in the low voltage CMOS (LVC) family, the advanced ultra-low power (AUP) family, and the advanced extremely low voltage and power (AXP) family. LVC has a wide supply voltage range of 1.65 to 5.5 V, whereas for power sensitive applications AUP has a supply range of 1.1 to 3.6 V, and for further power savings AXP has a supply range of 0.7 to 2.75 V with maximum static current dissipation of only 0.6 µA. This means that there is a configurable logic solution from 5 V all the way down to sub-1 volt applications. Dual Configurable logic can easily replace two discrete logic functions with a single package. However, if the designer is using complex logic functions, such as a NAND with one inverted input, one Dual Configurable package can replace as many as three, or even more discrete logic packages and their associated spacing requirements.