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single dev
The 74AUP1G57 is a single configurable logic gate. The state of each output is determined by eight patterns of a 3-bit input. All inputs can be connected directly to VCC or GND. Shown on this slide are the different standard and non-standard configurations possible. Non-standard functions such as 2-input NAND with one input inverted combine gates with inverters. This functionality can be achieved in two ways, either with inputs B and C or inputs C and A. These layout options provide added flexibility when using the non-standard functions.
PTM Published on: 2015-04-14