This slide shows an example of the potential static power consumption savings from Dual Configurable Logic. In the original discrete design, three individual logic packages make up the function of a NAND gate with one inverted input feeding into an Exclusive NOR. This circuit consumes 4.95 µW of static power at 3.3 V. By comparison, these three logic functions can be combined into one Dual Configurable logic package which consumes only 2.97 µW of static power at 3.3 V: a 40% saving.