Modes that are both privileged and represent an exception are the FIQ, IRQ, supervisor, abort, and undefined. These modes are entered when a specific exception occurs. Each of these modes have additional registers to prevent corruption and can, therefore, work with its own set of registers. By switching modes, those registers do not necessarily need to be stacked because those registers are available to that single mode alone. When the system comes back into a specific mode, that mode will have access to those same registers again. Each of the modes have access to system resources. They can change modes freely using ARM instructions and, on reset, the ARM core is in supervisor mode. Since the core doesn’t know which state it is going to be in, exceptions automatically switch the core to ARM state because you need to know exactly what state you're going to be in when you enter an exception.