The ARM7TDMI-S supports two instruction sets. The first is the ARM instruction set. ARM instructions are 32 bits long, many of which execute in a single cycle. Most of the ARM instructions can be conditionally executed. In other words, there are condition bits based on overflow, zero, negative, and carry conditions. The ARM instructions can be executed conditionally, depending on the state of these condition bits in the Current Program Status Register (CPSR). Finally, ARM instructions can be divided into six broad classes: branch instructions, data processing instructions, status register transfer instructions, load and store instructions, coprocessor instructions, and exception-generating instructions.