In this course, you learned that the ARM7TDMI-S is a three-stage instruction pipeline of Von Neumann architecture. You learned that the ARM state fetches 32-bit instruction sets and the Thumb state fetches 16-bit instruction sets. You learned about the seven processor modes: user, system, FIQ, IRQ, supervisor, abort, and undefined. Each mode was discussed in terms of privilege and exception modes as well. You learned about ARM registers, covering their use in both the ARM and Thumb states, including register banking. Finally, the three-stage instruction pipeline was discussed in detail, covering optimal pipelining, as well as branch pipelines.