“Peripheral Indirect Addressing”, or PIA, is a special addressing mode where the peripheral, not the DMA channel, provides the variable part of the dual port SRAM address. That is, the peripheral generates the LS-bits of the dual port SRAM address while the DMA channel provides the fixed buffer base address. However, the DMA channel continues to co-ordinate the actual data transfer, keep track of the transfer count and generate the corresponding CPU interrupts. This mode can operate bi-directionally depending upon the peripheral need, so the DMA channel still needs to be configured appropriately to support target peripheral reads or writes. PIA mode provides a basic form of scatter-gather addressing capability, but one that can be specifically tailored to meet the needs of each peripheral that supports it. The peripheral defines the address sequence for accessing the data within the dual port SRAM, allowing it to, for example, sort incoming ATD data into multiple buffers, relieving the CPU of the task. It is currently supported by the ATD and ECAN modules. Let’s now look at how it works in a little more detail.