CapSense is Cypress' touch-sensing user interface solution. SmartSense auto-tuning is an algorithm that enables CapSense buttons to continuously compensate for system, manufacturing, and environmental changes. It greatly simplifies product design by eliminating the need for any manual tuning. UDBs, or Universal Digital Blocks are PSoC’s programmable digital blocks that contain two PLDs, one programmable data path with an arithmetic logic unit, status and control registers, and can be configured with PSoC Creator using either PSoC Creator Components or a graphical state machine editor. The user may also write their own Verilog code. UDBs allow the user to create their own custom peripherals for PSoC systems. The Continuous Time Block is a programmable analog block that can be used to implement op-amps, PGAs, and comparators as shown in the images on this slide. In the image on the lower left side of this slide, some of PSoC’s programmable analog blocks and the CTB specifically can be seen, and how these can be configured in PSoC Creator to create analog circuits like the differential preamplifier in the right-hand example.