The Cypress PSoC 4 BLE integrates programmable AFEs, programmable Digital Logic, and CapSense into a single chip. The integration of all of these blocks together reduces the system’s BOM cost. The designer can use the programmable analog blocks such as the opamps, comparators, ADCs and DACs, to create custom AFEs for analog sensors. They can use the programmable digital blocks such as the Timer Counter PWM, the Serial Communication blocks, or the UDBs, to integrate digital logic. Users can also implement reliable and sophisticated user interfaces utilizing Cypress' CapSense technology. In addition, PSoC’s programmable architecture offers some very unique advantages. The power consumption can be reduced for battery-operated applications by offloading CPU tasks to the UDBs, saving CPU cycles. The designer can create custom digital peripherals using the UDBs, as shown in the example on the bottom of the slide, where an I2C wakes up the chip from an accelerometer input. These blocks can also be reconfigured during run time or during operation to create multiple functions, thereby allowing the same block to do different operations. With PSoC’s flexible architecture the designer can use any pin on the chip as an analog or digital I/O because of the on-chip multiplexers. The application shown is an actual PSoC Creator schematic illustrating a complete production design for an IoT system. Beginning at the left it has inputs from electrodes from a heart rate monitor, these are processed by the analog front end which is created using four opamps. Two of these operate as an instrumentation amplifier, whereas one is used as a filter. Once a signal is conditioned using the analog front end, it is input to the 12 msps SARADC. An accelerometer has been added using a customized component, plus a CapSense component to provide a user interface, a PWM component that could drive LEDs, a segment LCD component to drive displays, and the BLE component to provide Bluetooth Low Energy wireless communication. This illustrates how this complete design can be accomplished in a single chip, using a single tool with PSoC Creator, enabling the designer to create complete systems for the IoT.