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NOR v Q-SPI
A typical 16-bit parallel flash memory delivers a data transfer rate of 22 Mbps – assuming 90 nS access time. In systems that use a 32-bit microcontroller with a 32-bit bus for the external memory (like those from NXP), the designer can opt to use two 16-bit parallel devices in combination for a rate of 40 Mbps. However, the added speed comes at a cost. The configuration uses two separate parallel flash memories, each housed in a package with dozens of pins, which may be more in terms of package size, pin count, and PCB space, than the designer can afford. Serial flash, which typically uses the simple four-pin Serial Peripheral Interface (SPI), can be a good alternative to parallel flash when space, power, and cost are concerns, but it is much slower. The figure on this slide shows a typical SPI flash operating at 50 MHz transfers data at roughly 5 Mbps (eight times slower than a configuration that uses two 16-bit parallel devices). Another consideration is that the SPI interface on most microcontrollers is connected to the MCU’s peripheral matrix, where data has to be received by driver code and put into onboard RAM before the processor can access it. This can slow things down, since each read from serial flash has to go through a SPI software layer. Depending on the application, using the standard SPI interface for external memory may not be fast enough. The new quad SPI flash format, which uses a modified, six-pin SPI configuration, is much faster than traditional SPI formats. As shown, quad SPI delivers a transfer rate of 40 Mbps, which is the same as using two 16-bit parallel devices. Using quad SPI is often much less expensive than the parallel approach, since it uses far fewer pins and a much smaller package.
PTM Published on: 2013-08-28