This graph shows a typical low-power application actively running at 4 MHz, with a steady current consumption of 1.5 mA. Say that the application no longer needs to be active, it can execute a SLEEP or PWRSAV instruction with Deep Sleep enabled to power-down and conserve power. While in Deep Sleep, the device is at its lowest power state. With minimal features running, power consumption can be as low as 20 nA. Certain features such as the RTCC, DSWDT, and DSBOR can be configured to remain active, if desired. Maximizing the amount of time spent at Deep Sleep current levels will lower power consumption the most. At Deep Sleep current levels, a battery can provide power for years without being depleted. Eventually, the application needs to wake up. On devices without an internal core voltage regulator, wake-up times can be as low as 50 µs. Other devices may require 1 to 2 ms for Deep Sleep wake-up, due to core voltage regulator losses. Finally, the application resumes active operation, consuming the most power.