Waking up from Deep Sleep causes a Power-On Reset, which in turn, resets most registers back to their POR default values. However, immediately applying these default settings could be undesirable in a Deep Sleep application, so a special Deep Sleep feature prevents certain register changes from being applied during start-up. Without this feature, I/O pins would all revert to being tri-stated and the RTCC would be disabled immediately on wake-up. The end result would be losing track of time and losing control over external circuitry. Instead, application firmware has a chance after wake-up to initialize values other than the power-on defaults. Afterwards, firmware will manually clear the special Deep Sleep RELEASE state bit to allow register values to actively drive the hardware once again. At this point, application-specific tasks can be carried out, such as reading new data and outputting resulting data.