Efinity is the name of Efinix’s internally developed Integrated Development suite. It supports standard VHDL and Verilog inputs, including mixed mode, and supports a traditional tool flow of design entry, mapping, place and route, timing analysis, Bitstream generation and programming. The tool has two parts, the Interface Designer is where all the IOs and special functions that are needed are defined for the design with the appropriate characteristics such as IO type, drive strength, etc. The Interface Designer is also where the customer sets up configuration for any of the hard blocks needed, such as the memory controller or the MIPI/CSI hard blocks and the PLLs also. Once that is set up, the Core Designer is where all the logical functions happen, and where the customer sets up timing constraints and runs the rest of the tool flow such as mapping, place and route, etc.