In addition to the general-purpose DMA and the PDC for data transfers on the SAM3U, the high-speed USB Device embeds it own DMA master controller, which allows large transfers to be made without CPU intervention. It embeds a 4KB DPR memory to store full packet payloads, which prevents buffer underflow or overflow and which allows a reduced system clock. These 4KB RAM cannot be used as standard RAM even if users do not use the high-speed USB device. It has up to seven configurable endpoints, DPR buffers that are also configurable in size and number, and a dedicated DMA interface for six endpoints.