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SAM3U-PowerMgmt-Slide11
The implementation of the PIO controller on the SAM3U has a few new features. One of these is the capability to trigger an interrupt on any rising or falling edges and on high or low level. It is also possible to lock PIO lines from other peripherals to protect them from the user. There are two dedicated I/O clocks for the SPI and for the MCI that run at up to 65MHz at 3.0V. The other I/Os run at 35MHz at 1.62V with a 25 pF load capacitance. The results of benchmarks show that the PIO runs at 21MHz with master clock at 84MHz, equivalent to master clock divided by 4 for assembly code. For C code, it is possible to run at around 8 to 10MHz with the master clock at up to 84MHz.
PTM Published on: 2012-01-18