The general purpose DMA embeds four channels, three channels with 8 bytes of FIFO for channel buffering and one channel with 32 bytes of FIFO. It supports a wide range of transfer types, including memory-to-memory or peripheral-to-memory transfers for the SPI, SSC and MCI. A new feature of DMA implementation on the SAM3U is that the it can be triggered by the PWM controller or any Timer Counter channel to generate a waveform through the External Bus Interface.