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Cortex-M3 Introduction and Specific SAM3U Implementation Slide 7
The SAM3U uses the latest revison of the Cortex®-M3 core. There are a number of improvements over the previous version, most notably added low-power features. The wake-up controller is not implemented in the SAM3U because the same feature is handled by the supply controller of the SAM3U. There are also improvements in system features and debug functionalities to provide more flexibility in the implementation to reduce gate count. For example, there are several debug levels and trace levels to choose from. Another important feature is the optimization of internal data paths that makes it possible for the core to run up to 100 MHz, making it possible to run the SAM3U at up to 96 MHz worst case.
PTM Published on: 2011-12-27