The Cortex®-M3 integrates the core and some advanced system peripherals. There are four major characteristics of the core: Harvard architecture, with two different buses, one for instruction and one for data; 3-stage pipeline with branch speculation; Thumb and Thumb-2 decoder; and hardware divider and single-cycle multiply. These characteristics will be discussed in greater detail in the following slides. Surrounding the core is the processor, with some added or new features compared to previous ARM processors, in particular the ARM7TDMI, these include a nested vector interrupt controller, or NVIC, a configurable interrupt controller; a bus matrix; advanced debug components; and optional memory protection unit (MPU) and embedded trace macrocell (ETM).