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Cortex-M3 Introduction and Specific SAM3U Implementation Slide 15
An outstanding feature on the SAM3U4 is the dual boot Flash bank selection capability for IAP. This is managed by one of the GPNVM bits. GPNVM bits 0 and 1 have the same functionality as on Microchip’s SAM7 products, but the GPNVM bit 2 is specific to the SAM3U. This bit is responsible for the Flash selection, either Flash 0 or Flash 1. There are two Flash banks available, Flash bank 0 at the address 80000 and Flash bank 1 at address 100000. The user may have two different applications. When the GPNVM bit 2 is cleared, boot will occur at Application 1, and the Application 1 will be seen at Address 0. If the GPNVM bit 2 is set, then boot will occur at Application 2, or the Flash Bank 1 seen at Address 1. This is particularly useful when the customer wants to perform In-Application Programmming.
PTM Published on: 2011-12-27