Wide dynamic range, WDR, video surveillance is another application example that illustrates the co-processing and SoC themes. The block diagram on this slide shows how typical IP camera designs are segmented today. The FPGA is normally introduced into the system as a co-processor to handle sensor processing such as bridging from a specific sensor with high-speed LVDS I/Os to a standard video output. The FPGA can also be used to handle complex image processing functions with a specific intent, such as demanding processing for WDR sensor or image stabilization techniques, etc. When the sensor or image pre-processing functions change, the FPGA can be reconfigured without designing a new board. This gives the user the flexibility to update products quickly. The DSP device typically controls back-end functions such as motor control for panning, tilting, and zooming, and H.264 video encoding. It also manages the Ethernet connection. Using the FPGA as a co-processor or a SoC, as will be seen on the next slide, results in improved integration capabilities and design flexibility. The user can also address power, cost, and board space requirements. An FPGA like the Cyclone IV® is an ideal platform to absorb and perform all tasks on the block diagram shown on the slide.