So what is inside the Power Block? On the left hand side, a 3D figure of the power block is shown. The low side and high side FETs have been stacked into a 5.0 mm x 6.0 mm package. The 3D image shows the low side FET on the bottom, the high side FET on top as well as a switch node clip between the two MOSFETs. The Vin clip is then stacked on top of the high side FET. The source-down stacked die helps reduce total source inductance.