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NexFET MOSFET Technology PTM Slide 10

The TI NexFET™ Power Block device is an optimized design for synchronous buck applications offering high-current, high-efficiency and high-frequency capabilities. The Power Block device uses an advanced package technology called “source-down stacked die”, which stacks the high side FET and low side FET together and integrates them into one single package. This way, the source of the high side FET is directly connected to the drain of the low side FET die, and the source of the low side FET contacts right to the GND pad. Therefore, package-induced low side drain inductance and CSIs for both high side and low side FET are significantly reduced as it is shown in the schematic picture. In addition, by integrating the high side and low side FET into one chip, TI Power Block devices also minimize the converter size and simplifies system designs.

PTM Published on: 2011-12-19