Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Product List
The Ultra Low Power MSP430 Slide 8

Shown here is the MSP430 interrupt processing. Initially the interrupt service routine (ISR) is pointed to item 2. When an interrupt occurs, the program counter and status register are pushed to the stack, the interrupt vector is moved to the program counter, and the GIE, CPU OFF, OSC OFF and SCG1 bits are cleared in the status register. Also, single-source interrupt flags are automatically cleared. When the interrupt service routine executes the RETI instruction, the status register and the program counter are popped. Notice that inside of the ISR, the low power mode control bits, CPU OFF, OSC OFF and SCG1 are automatically cleared. This automatically takes the MSP430 out of the low power mode that it was in and activates it for code execution. Next, when exiting the ISR, the original status register gets popped off the stack and back into the status register. Therefore, if the interrupt occurred while the MSP430 was in a low power mode, the bits that defined that low power mode will become set again. This automatically puts the MSP430 back into the low power mode that it was in prior to the interrupt.

PTM Published on: 2008-04-03