Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Product List
The Ultra Low Power MSP430 Slide 5

Shown here is a block diagram of the basic clock system for the 11x and 12x devices. Clock systems will vary from device to device and family to family, so always check the MSP430 Family Users Guide for the specific device family to determine which clock options are available. All MSP430 clock systems have two components that are the same, the LFXT1 oscillator and the DCO. The LFXT1 oscillator is a low-power, 32 kilohertz or 32768 hertz crystal oscillator externally connected to the device and sources the A Clock inside the device. The other clock, the DCO, is fully contained on the chip and provides the instant-on, processing on demand capability. The three clock signals - A Clock, M Clock and SM Clock - are routed throughout the chip to all of the peripherals. The M Clock goes only to specific peripherals and sources the CPU, while the A Clock and SM Clock go to all peripherals. In between the LFXT1 and DCO oscillators and the three named clock systems is the clock distribution tree constructed of multiplexers. Again, these choices vary by device and should always checked against the MSP430 Users Guide to determine which choices to source with which of the clock signals. Above the block diagram is the status register with four bits highlighted: SCG1, SCG0, OSC OFF and CPU OFF. The corresponding clock system components are also highlighted in the block diagram showing which clock each of the four bits control. These four bits are highlighted because they control the MSP430 power modes. Also, since the bits control pieces of the clock system, they define the MSP430 low power modes by setting which components of the clock system remain enabled and disabled.

PTM Published on: 2008-04-03