Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Product List
The Ultra Low Power MSP430 Slide 6

The definition of the bit settings required to set the various low power modes are shown here. When all four of the bits are clear, the device is in active mode, all of the clocks are enabled, the CPU is on and executing code, and all peripherals are active that are enabled and clocked. LPM0 is entered when CPU OFF is set, LPM3 when SCG1, SCG0 and CPU OFF are set, and LPM4 when all the bits are set. Also shown in this chart is the approximate current consumption of a device in these different power modes. These values are typical for a typical MSP430, different devices will have different specifications which can be found in the device-specific data sheet. LPM1 and LPM2 also exist and have definitions for these bits, but in general they do not provide any added benefit over LPM3 or LPM0. So to keep things simple, users typically use LPM0, LPM3 and then LPM4 where all the clocks are off. The instruction line at the bottom of the slide shows just how easy it is to enter one of the LPM modes. The instruction definition is bit set (bis.w), the CPU OFF bit (#CPUOFF), and in the status register (SR). Simply setting any of these bits, or the correct combination of these bits enters the defined low power mode.

PTM Published on: 2008-04-03