The threshold of an eGaN FET is generally lower than that of silicon MOSFETs. This poses less of a limitation to the designer because there is an essentially flat relationship between threshold and temperature along with the very low gate-to-drain. This figure shows the transfer characteristics curve for the EPC2001, 100-V, 7-mΩ eGaN FET. Please note the negative relationship between current and temperature. This allows excellent current sharing in the linear region and in diode conduction. Being that the device starts to conduct significant current at 1.6V, care must be taken to ensure a low-impedance path from gate to source when the device needs to be held off during dV/dt in a rectifier function. EPC’s eGaN FETs have a maximum gate voltage of +6V to -5V, which is more than adequate to fully enhance the channel. However, lower gate-to-source voltage limits compared with silicon MOSFETs mean a more accurate gate drive voltage is required, but this also means total gate drive losses will be lower.