One of the most unique and important performance enhancing features of the AT91SAM family is the peripheral DMA controller (PDC). The use of multiple PDCs relieves the processor from peripheral to memory data transfers. In addition, the PDC reduces the number of bus cycles needed for a data transfer, freeing the bus to the processor for data and instruction fetches out of shared memory. The resulting benefit to the customer is the possibility to have multiple high bandwidth peripherals communicating in parallel and leave sufficient bus bandwidth for the processor to run the application. Other benefits of the PDC are the simplification of the peripheral drivers and the ability to transfer data when the rest of the chip is in idle mode reducing power consumption and noise levels critical for analog signal acquisition. Two sets of pointers enable streaming data transfer via automatic switching between the dual buffers in memory.