The UART engine contains full duplex with 8 or 9-bit multi-processor mode data transfers with even/odd parity generation and 1 or 2 stop bit modes. There are separate transmit/receive and error condition interrupts. The receive/transmit can be enabled separately with their own data buffers. Also included are an IrDA interface and LIN master/slave modes. The baud rate generator can also be used as a general purpose timer.